What's new

Welcome to App4Day.com

Join us now to get access to all our features. Once registered and logged in, you will be able to create topics, post replies to existing threads, give reputation to your fellow members, get your own private messenger, and so, so much more. It's also quick and totally free, so what are you waiting for?

Foundations of Static Timing Analysis

V

voska89

Moderator
Joined
Jul 7, 2023
Messages
42,387
Reaction score
0
Points
36
2cf533a9e0b26fdb24670dc9c7d572b5.jpeg

Free Download Foundations of Static Timing Analysis
Published 10/2023
Created by Ananth Noorithaya
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz, 2 Ch
Genre: eLearning | Language: English | Duration: 8 Lectures ( 2h 5m ) | Size: 2.14 GB​

STA vs. DTA ; Flip-flop from bistable element; delays discussion; setup-time and hold-time; timing paths and exceptions
What you'll learn
Static timing analysis vs. Dynamic Timing Analysis
Flip-flop construction from bistable element
Timing arcs in a flip flop and delays in sequential circuits
Setup-time and hold-time analysis
Types of timing paths
Introduction to timing exceptions
Requirements
Basic level of undergraduate-level digital electronics is required. This course will build off from there onwards
Description
Are you at University and want to make choices about your career in the STA-related roles of semiconductor industry?ORAre you looking to revisit the basic concepts just before a job interview for a digital design/STA - related role?OR Are you a working professional who is looking to rebuild the foundations of Static Timing Analysis ?Look no further, because this course is designed just for YOU!! In this course, you will learn about Static Timing Analysis and Dynamic Timing Analysis and their individual use-cases. You will learn about key concepts and terms of STA. This course is time-effective and has illustrative explanations. Fun cartoon characters  will demonstrate the difficult concepts with ease  :).  We discuss about the setup-time and hold-time concepts and their constraints in context of timing analysis. We also discuss about timing paths and a brief introduction to timing exceptions. In a mad-paced execution environment to tape out chips to serve customers world-wide, it is quite common for professionals to overlook the importance of keeping their foundations strong and relevant. This course is a one stop platform to refresh/revise/revisit the core concepts if you are already in the semiconductor industry in digital design/STA-related role. Looking forward to see you in the course!
Who this course is for
University-level students who are looking to understand IC design / VLSI concepts before deciding to choose to make a career in semiconductor industry
Entry-level and mid-level working professionals who are looking to revisit the basics quickly

Recommend Download Link Hight Speed | Please Say Thanks Keep Topic Live
No Password - Links are Interchangeable
 
Top Bottom